Three-dimensional vertical NAND strings are disclosed in an article by T. Endoh, et al., titled “Novel Ultra High Density Memory With A Stacked-Surrounding Gate Transistor (S-SGT) Structured Cell”, IEDM Proc. (2001) 33-36. However, this NAND string provides only one bit per cell. Furthermore, the active regions of the NAND string is formed by a relatively difficult and time consuming process involving repeated formation of sidewall spacers and etching of a portion of the substrate, which results in a roughly conical active region shape.
Alternatively, NAND strings can be formed along a horizontal direction on a surface of a substrate. In such a configuration, the tunneling dielectrics can laterally extend along the horizontal direction. The overlap between the active areas and the tunneling dielectrics of a horizontal NAND string can affect performance and reliability of the NAND string.